1. Field of the Invention
The present invention relates to the techniques for integrated circuit design, and more particularly to a comparator with reduced power consumption and a method for reducing power consumption of a comparator.
2. Description of Related Art
As well known, various comparator circuits are utilized in integrated circuit devices (IC) for different purposes. For example, in a switched-capacitor circuit which is able to achieve a variety of functions by depositing and transferring charges in a capacitor, a comparator circuit includes a switch circuit controlled by a clock signal is introduced to determine the state of an input voltage signal by comparing the input voltage signal against a reference voltage signal. For eliminating the noise introduced by clock crossed-interference and remaining voltage from switching on/off of the MOS transistors, the comparator circuit is provided with a differential amplifier to amplify the difference between the input voltage signal and the reference voltage signal.
FIG. 1 is a schematic block diagram illustrating a conventional high definition comparator in a switched capacitor circuit. As shown in FIG. 1, the comparator has a pair of input signal pins VIP and VIN, a positive output signal pin VOR, a negative output signal pin VOS, a low voltage level signal pin VL, a sub-low voltage level signal pin VLSUB, a high voltage level signal pin VH and a clock signal pin CLK. In operation, when the CLK signal is at a low voltage level (shortened as “L” hereafter), the comparator comes into an idle state. In the idle state, the comparator does not compare the input signal VIP with the input signal VIN so that the output signal VOR is identical to the output signal VOS, e.g., both of the output signals VOR and VOS are L. At this state, there is almost no power consumption in the comparator. When the CLK signal is high voltage level (shortened as “H” hereafter), the comparator comes into a busy state. In the busy state, the comparator compares the input signal VIP with the input signal VIN and determines the values of the output signals VOR and VOS depending on the comparing result, e.g., if the input signal VIP is larger than the input signal VIN, the output signal VOR is H and the output signal VOS is L; otherwise, the output signal VOR is L and the output signal VOS is H.
Although the comparing result is already obtained, as long as the CLK signal still is H, the comparator may keep comparing the input signals VIP and VIN all the time. As a result, the comparator may also consume a great deal of energy.
Thus, improved techniques for providing a comparator with reduced power consumption are desired to overcome the above disadvantages.